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(parent: ae33cdc) | patch
drm/i915: Add Valleyview lane control definitions
authorVijay Purushothaman <vijay.a.purushothaman@intel.com>
Thu, 27 Sep 2012 13:43:03 +0000 (19:13 +0530)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Fri, 28 Sep 2012 14:48:27 +0000 (16:48 +0200)
commitb56747aace48a269fefa7d337963cbae6e95b0a0
tree6a7e18be48a67fa26de921f0a9269742076d5be1tree | snapshot (tar.gz zip)
parentae33cdcfc6aba86505f7a8ec288e3e1f7277de62commit | diff
drm/i915: Add Valleyview lane control definitions

Added DPIO data lane register definitions for Valleyview

Signed-off-by: Vijay Purushothaman <vijay.a.purushothaman@intel.com>
Signed-off-by: Ben Widawsky <benjamin.widawsky@intel.com>
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/i915_reg.h diff | blob | blame | history