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(parent: 883a3d2) | patch
drm/i915: Read out display FIFO size on VLV/CHV
authorVille Syrjälä <ville.syrjala@linux.intel.com>
Thu, 5 Mar 2015 19:19:47 +0000 (21:19 +0200)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Tue, 17 Mar 2015 21:30:04 +0000 (22:30 +0100)
commitb500472026e40ef2a4827a5973dc5424c98ede92
tree41fa7c22ea3312fd153ac658aed330e29376e40ftree | snapshot (tar.gz zip)
parent883a3d2f65212388b1577ebc020648fc95fa5d72commit | diff
drm/i915: Read out display FIFO size on VLV/CHV

VLV/CHV have similar DSPARB registers as older platforms, just more of
them due to more planes. Add a bit of code to read out the current FIFO
split from the registers. Will be useful later when we improve the WM
calculations.

v2: Add display_mmio_offset to DSPARB

Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/i915_reg.h diff | blob | blame | history
drivers/gpu/drm/i915/intel_pm.c diff | blob | blame | history