projects / GitHub / moto-9609 / android_kernel_motorola_exynos9610.git / commit
? search:
summary | shortlog | log | commit | commitdiff | tree
(parent: cf8709e) | patch
clk: atlas7: fix pll missed divide NR in fraction mode
authorGuo Zeng <guo.zeng@csr.com>
Tue, 4 Aug 2015 14:45:32 +0000 (14:45 +0000)
committerMichael Turquette <mturquette@baylibre.com>
Mon, 24 Aug 2015 23:49:08 +0000 (16:49 -0700)
commitb32a7cc63bee7bffbd61f88b157b78a9b2101de0
tree56000db2b33e03ad64c862b9deb1cf7915733bd1tree | snapshot (tar.gz zip)
parentcf8709eabc07c4681eb0bfd63139142c9bef8b59commit | diff
clk: atlas7: fix pll missed divide NR in fraction mode

PLL VCO frequency is given by Fvco = Fref * 2 * NF / NR
in integer-N mode, or by Fvco = Fref * SSN / NR in Spread
Spectrum (fractional-N) mode. Thus fix the missing part
of NR

Signed-off-by: Guo Zeng <guo.zeng@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
drivers/clk/sirf/clk-atlas7.c diff | blob | blame | history