BACKPORT: arm64: Add CNTFRQ_EL0 trap handler
authorMarc Zyngier <marc.zyngier@arm.com>
Mon, 24 Apr 2017 08:04:03 +0000 (09:04 +0100)
committerGreg Kroah-Hartman <gregkh@google.com>
Tue, 9 Jan 2018 12:35:07 +0000 (13:35 +0100)
commitb0dc52ea0834364ea4b62d0977fb5511f37ccf5a
treee0ef00d525b7033b746d62137aac2c1505f206fb
parentbd3c67ac4fe8be040ac4cbcafdc4731b52dc1321
BACKPORT: arm64: Add CNTFRQ_EL0 trap handler

We now trap accesses to CNTVCT_EL0 when the counter is broken
enough to require the kernel to mediate the access. But it
turns out that some existing userspace (such as OpenMPI) do
probe for the counter frequency, leading to an UNDEF exception
as CNTVCT_EL0 and CNTFRQ_EL0 share the same control bit.

The fix is to handle the exception the same way we do for CNTVCT_EL0.

Fixes: a86bd139f2ae ("arm64: arch_timer: Enable CNTVCT_EL0 trap if workaround is enabled")
Reported-by: Hanjun Guo <guohanjun@huawei.com>
Tested-by: Hanjun Guo <guohanjun@huawei.com>
Reviewed-by: Hanjun Guo <guohanjun@huawei.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
(cherry picked from commit 9842119a238bfb92cbab63258dabb54f0e7b111b)

Change-Id: I2f163e2511bab6225f319c0a9e732735cbd108a0
Signed-off-by: Greg Kroah-Hartman <gregkh@google.com>
arch/arm64/include/asm/esr.h
arch/arm64/kernel/traps.c