projects / GitHub / LineageOS / android_kernel_motorola_exynos9610.git / commit
? search:
summary | shortlog | log | commit | commitdiff | tree
(parent: 8b5c18f) | patch
ARM: l2c: spear13xx: remove cache size override
authorRussell King <rmk+kernel@arm.linux.org.uk>
Wed, 19 Mar 2014 12:18:02 +0000 (12:18 +0000)
committerRussell King <rmk+kernel@arm.linux.org.uk>
Thu, 29 May 2014 23:50:06 +0000 (00:50 +0100)
commitadf4b00ebf4e183f36d88d5a5a591c532fb0abe9
tree55f37d9f98f18f8ae6af62b1d0c19ac900b0c5eftree | snapshot (tar.gz zip)
parent8b5c18f05621394eb108d3fbc9bf98b05e8162dbcommit | diff
ARM: l2c: spear13xx: remove cache size override

The cache size should already be present in the L2 cache auxiliary
control register: it is part of the integration process to configure
the hardware IP.  Most platforms get this right, yet still many
cargo-cult program, and assume that they always need specifying to
the L2 cache code.  Remove them so we can find out which really need
this.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
arch/arm/mach-spear/spear13xx.c diff | blob | blame | history