mmc: sunxi: Add support for A83T eMMC (MMC2)
authorChen-Yu Tsai <wens@csie.org>
Mon, 24 Jul 2017 13:59:01 +0000 (21:59 +0800)
committerUlf Hansson <ulf.hansson@linaro.org>
Wed, 30 Aug 2017 12:01:49 +0000 (14:01 +0200)
commitac98caefe18ab845f4cef6612209212c669008ce
treea0effb9857b4b1bde21ef9a2eea3b832c48b4ef3
parentc903a2ae546a724a1266628d82917ce0ca994d50
mmc: sunxi: Add support for A83T eMMC (MMC2)

The third MMC controller (MMC2) on the Allwinner A83T SoC is slightly
different. It supports a wider 8-bit bus, has a dedicated controllable
reset pin for eMMC, and a "new timing mode" which is supposed to deliver
better signals and thus better performance.

Add a compatible for this one to use the new timing mode not found in the
other controllers.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Documentation/devicetree/bindings/mmc/sunxi-mmc.txt
drivers/mmc/host/sunxi-mmc.c