PCI: xilinx-nwl: Add support for Xilinx NWL PCIe Host Controller
authorBharat Kumar Gogada <bharat.kumar.gogada@xilinx.com>
Sun, 6 Mar 2016 16:32:14 +0000 (22:02 +0530)
committerBjorn Helgaas <bhelgaas@google.com>
Fri, 11 Mar 2016 18:42:31 +0000 (12:42 -0600)
commitab597d35ef11d2a921e0ec507a9b7861bcb44cbd
tree03a441b7a660ce79257e1612fbb2c33b5aee9bb9
parent92e963f50fc74041b5e9e744c330dca48e04f08d
PCI: xilinx-nwl: Add support for Xilinx NWL PCIe Host Controller

Add PCIe Root Port driver for Xilinx PCIe NWL bridge IP.

[bhelgaas: wait for link like dw_pcie_wait_for_link(), simplify bitmap
error path, typos, whitespace, fold in Dan Carpenter's PTR_ERR() fix]
Signed-off-by: Bharat Kumar Gogada <bharatku@xilinx.com>
Signed-off-by: Ravi Kiran Gummaluri <rgummal@xilinx.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Marc Zyngier <marc.zyngier@arm.com>
Acked-by: Rob Herring <robh@kernel.org>
Documentation/devicetree/bindings/pci/xilinx-nwl-pcie.txt [new file with mode: 0644]
drivers/pci/host/Kconfig
drivers/pci/host/Makefile
drivers/pci/host/pcie-xilinx-nwl.c [new file with mode: 0644]