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(parent: b906487) | patch
drm/i915: PIPE M/N registers need an offset on VLV
authorVille Syrjälä <ville.syrjala@linux.intel.com>
Thu, 24 Jan 2013 13:29:32 +0000 (15:29 +0200)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Thu, 24 Jan 2013 21:34:37 +0000 (22:34 +0100)
commitaab17139a0eec686bad80579f7a5d6969c998392
treebaa9d925d04f8b1d74a03eedcb248a68917c7ddctree | snapshot (tar.gz zip)
parentb906487c515711d79e31ceb9fe75738574b5c3a2commit | diff
drm/i915: PIPE M/N registers need an offset on VLV

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/i915_reg.h diff | blob | blame | history