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(parent: 35ceabf) | patch
drm/i915/cnl: Get DDI clock based on PLLs.
authorRodrigo Vivi <rodrigo.vivi@intel.com>
Thu, 6 Jul 2017 20:52:01 +0000 (13:52 -0700)
committerRodrigo Vivi <rodrigo.vivi@intel.com>
Fri, 7 Jul 2017 17:01:26 +0000 (10:01 -0700)
commita9701a897067db118f1a0fcf59ce8391e3612687
tree0d767e2de9a6bc89cc5390895fdb97b9317790f7tree | snapshot (tar.gz zip)
parent35ceabf3cdb557b23bbc09f0b6f7bb2b545185b1commit | diff
drm/i915/cnl: Get DDI clock based on PLLs.

PLLs are the source clocks for the DDIs so in order
to determine the ddi clock we need to check the PLL
configuration.

v2: Mika pointed out that 24 was hardcoded while it
    should consider ref clock that can be either 24KHz
    or 19.2KHz on CNL.

Reviewed-by: Mika Kahola <mika.kahola@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1499374321-31152-1-git-send-email-rodrigo.vivi@intel.com
drivers/gpu/drm/i915/i915_reg.h diff | blob | blame | history
drivers/gpu/drm/i915/intel_ddi.c diff | blob | blame | history