MIPS: Allow MIPS_CPU_SCACHE to be used with different line sizes
authorKevin Cernekee <cernekee@gmail.com>
Tue, 21 Oct 2014 04:27:57 +0000 (21:27 -0700)
committerRalf Baechle <ralf@linux-mips.org>
Mon, 24 Nov 2014 06:45:11 +0000 (07:45 +0100)
commita7ef1eaddbf4bd50bfee92d9dfbecadc61467bbf
tree05dae8279d0ea3b6bcc6d56a1e99bae5ec9446ce
parent3677a283621446805044a73a36b3539a0b41bc12
MIPS: Allow MIPS_CPU_SCACHE to be used with different line sizes

CONFIG_MIPS_CPU_SCACHE determines whether to build sc-mips.c.  However,
it is currently hardwired to use an L1_SHIFT of 6 (64 bytes).  Move the
L1_SHIFT selection into the CPU or SoC section so that other SoCs can
select different values.

Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
Cc: f.fainelli@gmail.com
Cc: mbizon@freebox.fr
Cc: jogo@openwrt.org
Cc: jfraser@broadcom.com
Cc: linux-mips@linux-mips.org
Cc: devicetree@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/8162/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
arch/mips/Kconfig