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(parent: b37a643) | patch
drm/i915: Assume 400MHz cdclk for the rest of gen4-7
authorVille Syrjälä <ville.syrjala@linux.intel.com>
Tue, 31 Mar 2015 11:11:56 +0000 (14:11 +0300)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Tue, 31 Mar 2015 15:28:46 +0000 (17:28 +0200)
commita7c66cd86ae0a2377b6efda56b93b26ce1f4322e
treeaf38b4c82717babfb4dd5755f7abf8c1507e75e4tree | snapshot (tar.gz zip)
parentb37a6434cfa9477e6e5cb386e7e3d135073aef63commit | diff
drm/i915: Assume 400MHz cdclk for the rest of gen4-7

We don't currently have cdclk extraction code for 965g,snb,ivb.
Let's assume 400 MHz until we know better. That seems to match hints
in various vague documents. Whether that's good enough is not
entirely clear.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Mika Kahola <mika.kahola@intel.com>
Acked-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/intel_display.c diff | blob | blame | history