drm/i915: Enable DDI IO power domains in the DP MST path
authorAnder Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Wed, 1 Mar 2017 14:13:11 +0000 (16:13 +0200)
committerAnder Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Thu, 2 Mar 2017 08:49:00 +0000 (10:49 +0200)
commita746095c2db08d765222bf0058e76fb329d69e0e
tree4d01a9eeac656ca3dc1c7f2686b65c5078e50932
parent02e012f1727f9c8fe24872c74d91019e35e5897b
drm/i915: Enable DDI IO power domains in the DP MST path

Commit 62b695662a24 ("drm/i915: Only enable DDI IO power domains after
enabling DPLL") changed how the DDI IO power domains get enabled, but
neglected the need to enable those domains when enabling a DP connector
with MST enabled, leading to

    Kernel panic - not syncing: Timeout: Not all CPUs entered broadcast exception handler

Fixes: 62b695662a24 ("drm/i915: Only enable DDI IO power domains after enabling DPLL")
Cc: Imre Deak <imre.deak@intel.com>
Cc: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Cc: David Weinehall <david.weinehall@linux.intel.com>
Cc: Daniel Vetter <daniel.vetter@intel.com>
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Cc: intel-gfx@lists.freedesktop.org
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reported-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/20170301141318.3607-2-ander.conselvan.de.oliveira@intel.com
drivers/gpu/drm/i915/intel_dp_mst.c