perf/x86: Export PEBS load latency threshold register to sysfs
authorStephane Eranian <eranian@google.com>
Thu, 24 Jan 2013 15:10:33 +0000 (16:10 +0100)
committerArnaldo Carvalho de Melo <acme@redhat.com>
Mon, 1 Apr 2013 15:16:49 +0000 (12:16 -0300)
commita63fcab45273174e665e6a8c9fa1a79a9046d0d5
tree9e226f2d0b16af00e07762cef783c7cae2b27b15
parentf20093eef5f7843a25adfc0512617d4b1ff1aa6e
perf/x86: Export PEBS load latency threshold register to sysfs

Make the PEBS Load Latency threshold register layout
and encoding visible to user level tools.

Signed-off-by: Stephane Eranian <eranian@google.com>
Cc: peterz@infradead.org
Cc: ak@linux.intel.com
Cc: acme@redhat.com
Cc: jolsa@redhat.com
Cc: namhyung.kim@lge.com
Link: http://lkml.kernel.org/r/1359040242-8269-10-git-send-email-eranian@google.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
arch/x86/kernel/cpu/perf_event_intel.c