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mmc: sdhci-of-esdhc: limit SD clock for ls1012a/ls1046a
authoryangbo lu <yangbo.lu@nxp.com>
Thu, 20 Apr 2017 06:58:29 +0000 (14:58 +0800)
committerUlf Hansson <ulf.hansson@linaro.org>
Fri, 28 Apr 2017 12:53:13 +0000 (14:53 +0200)
commita627f025eb0534052ff451427c16750b3530634c
tree60a8e75c77fff90b506ddebdfa72a36348d001a5tree | snapshot (tar.gz zip)
parente145ac451eb68b51e0ede4c131bd5a539fb675b6commit | diff
mmc: sdhci-of-esdhc: limit SD clock for ls1012a/ls1046a

The ls1046a datasheet specified that the max SD clock frequency
for eSDHC SDR104/HS200 was 167MHz, and the ls1012a datasheet
specified it's 125MHz for ls1012a. So this patch is to add the
limitation.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
drivers/mmc/host/sdhci-of-esdhc.c diff | blob | blame | history