arm64: tegra: Fix AGIC register range
authorJon Hunter <jonathanh@nvidia.com>
Thu, 20 Jun 2019 08:17:00 +0000 (09:17 +0100)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Wed, 31 Jul 2019 05:28:38 +0000 (07:28 +0200)
commita610564a2d760322779dc6aa0cda56c1518ff9c5
treee7d29ff554a7ac871bcafd6ee4adbe4756e559e4
parenteba797dbf352244429cc60a6577c0c0e5ad745b0
arm64: tegra: Fix AGIC register range

commit ba24eee6686f6ed3738602b54d959253316a9541 upstream.

The Tegra AGIC interrupt controller is an ARM GIC400 interrupt
controller. Per the ARM GIC device-tree binding, the first address
region is for the GIC distributor registers and the second address
region is for the GIC CPU interface registers. The address space for
the distributor registers is 4kB, but currently this is incorrectly
defined as 8kB for the Tegra AGIC and overlaps with the CPU interface
registers. Correct the address space for the distributor to be 4kB.

Cc: stable@vger.kernel.org
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Fixes: bcdbde433542 ("arm64: tegra: Add AGIC node for Tegra210")
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
arch/arm64/boot/dts/nvidia/tegra210.dtsi