arm64: Reuse TCR field definitions for EL1 and EL2
authorSuzuki K Poulose <suzuki.poulose@arm.com>
Mon, 4 Apr 2016 10:43:15 +0000 (11:43 +0100)
committerChristoffer Dall <christoffer.dall@linaro.org>
Thu, 21 Apr 2016 12:56:28 +0000 (14:56 +0200)
commita563f7598198b8389e00451ef6f3f1c12efbfb99
treeaea2df776c2cd3ac4438915b07ba85e3a1131930
parent06a71a24bae57a07afee9cda6b00495347d8a448
arm64: Reuse TCR field definitions for EL1 and EL2

TCR_EL1, TCR_EL2 and VTCR_EL2, all share some field positions
(TG0, ORGN0, IRGN0 and SH0) and their corresponding value definitions.

This patch makes the TCR_EL1 definitions reusable and uses them for TCR_EL2
and VTCR_EL2 fields.

This also fixes a bug where we assume TG0 in {V}TCR_EL2 is 1bit field.

Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Acked-by: Will Deacon <will.deacon@arm.com>
Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
arch/arm64/include/asm/kvm_arm.h
arch/arm64/include/asm/pgtable-hwdef.h