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(parent: 7d1311b) | patch
arm64: fix typo in I-cache policy detection
authorArd Biesheuvel <ard.biesheuvel@linaro.org>
Tue, 5 Aug 2014 09:25:55 +0000 (10:25 +0100)
committerWill Deacon <will.deacon@arm.com>
Mon, 18 Aug 2014 18:47:03 +0000 (19:47 +0100)
commita3a80544acb3dfa97d43b8eee1332fe1fca7fe51
tree3ca111e74a6addb43b403bd43cfb73bc0b3aab13tree | snapshot (tar.gz zip)
parent7d1311b93e58ed55f3a31cc8f94c4b8fe988a2b9commit | diff
arm64: fix typo in I-cache policy detection

This removes an unfortunately placed semi-colon resulting in all instruction
caches being classified as AIVIVT.

Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
arch/arm64/kernel/cpuinfo.c diff | blob | blame | history