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(parent: ddc76ff) | patch
drm/radeon/cik: properly set up the clearstate buffer for pg (v2)
authorAlex Deucher <alexander.deucher@amd.com>
Thu, 22 Aug 2013 15:57:46 +0000 (11:57 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Fri, 30 Aug 2013 20:30:56 +0000 (16:30 -0400)
commita0f38609c9870fe0e3d5c10b1e6926a5750d0a7a
tree97d775b94594d63235c812b81e28161c00d17405tree | snapshot (tar.gz zip)
parentddc76ff6c78ecb189102bdc3bd9d14de5b750a6fcommit | diff
drm/radeon/cik: properly set up the clearstate buffer for pg (v2)

The format of the clearstate buffer used for pg (powergating)
changed between NI and SI.  This formats it properly for what
the hardware expects on SI+.

v2: fix addresses

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/radeon/cik.c diff | blob | blame | history
drivers/gpu/drm/radeon/evergreen.c diff | blob | blame | history