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(parent: a1edc18) | patch
staging/hfi1: set Gen3 half-swing for integrated devices
authorDean Luick <dean.luick@intel.com>
Mon, 11 Jan 2016 18:04:33 +0000 (13:04 -0500)
committerDoug Ledford <dledford@redhat.com>
Tue, 1 Mar 2016 15:36:10 +0000 (10:36 -0500)
commita06e825a13c363da31936d04645e94b99aeb34e2
tree9d4375d7e77fb5aec5aa1aae0c31d12bf71930fetree | snapshot (tar.gz zip)
parenta1edc18a484285fcaf4bb73241f573ccb8f06fbccommit | diff
staging/hfi1: set Gen3 half-swing for integrated devices

Correctly set half-swing for integrated devices.  A0 needs all fields set for
CcePcieCtrl.  B0 and later only need a few fields set.

Reviewed-by: Stuart Summers <john.s.summers@intel.com>
Signed-off-by: Dean Luick <dean.luick@intel.com>
Signed-off-by: Ira Weiny <ira.weiny@intel.com>
Signed-off-by: Doug Ledford <dledford@redhat.com>
drivers/staging/rdma/hfi1/chip_registers.h diff | blob | blame | history
drivers/staging/rdma/hfi1/pcie.c diff | blob | blame | history