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(parent: fcbc34e) | patch
drm/i915: Rename PIPE_CONTROL bit defines to be less terse.
authorKenneth Graunke <kenneth@whitecape.org>
Tue, 11 Oct 2011 21:41:09 +0000 (23:41 +0200)
committerKeith Packard <keithp@keithp.com>
Thu, 20 Oct 2011 22:26:40 +0000 (15:26 -0700)
commit9d971b37534fb268251f74cc04a36a0a16f7da04
treed36515e0f4d217addbef4faf949f67363ee5e2f0tree | snapshot (tar.gz zip)
parentfcbc34e4dc9ed43f5b147e95beec56c987c683c5commit | diff
drm/i915: Rename PIPE_CONTROL bit defines to be less terse.

"STALL_AT_SCOREBOARD" is much clearer than "STALL_EN" now that there are
several different kinds of stalls.  Also, "INSTRUCTION_CACHE_INVALIDATE"
is a lot easier to understand at a glance than the terse "IS_FLUSH."

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
[danvet: use INVALIDATE for ro cache flags for more consistency]
Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Keith Packard <keithp@keithp.com>
drivers/gpu/drm/i915/i915_reg.h diff | blob | blame | history
drivers/gpu/drm/i915/intel_ringbuffer.c diff | blob | blame | history