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(parent: 794464f) | patch
powerpc/64s: Add SCV FSCR bit for ISA v3.0
authorNicholas Piggin <npiggin@gmail.com>
Fri, 7 Apr 2017 01:27:44 +0000 (11:27 +1000)
committerMichael Ellerman <mpe@ellerman.id.au>
Thu, 13 Apr 2017 13:34:32 +0000 (23:34 +1000)
commit9b7ff0c6586bc0541ebcd1ff6773b11a49f1a058
treec7b8f96f7e244d47dd6240e0e06d6929a9bc4cbdtree | snapshot (tar.gz zip)
parent794464f4dea0b13dacad267c06a01fc9c24f713acommit | diff
powerpc/64s: Add SCV FSCR bit for ISA v3.0

Add the bit definition and use it in facility_unavailable_exception() so we can
intelligently report the cause if we take a fault for SCV. This doesn't actually
enable SCV.

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
[mpe: Drop whitespace changes to the existing entries, flush out change log]
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
arch/powerpc/include/asm/reg.h diff | blob | blame | history
arch/powerpc/kernel/traps.c diff | blob | blame | history