clk: vc5: Add structure to describe particular chip features
authorAlexey Firago <alexey_firago@mentor.com>
Fri, 7 Apr 2017 09:12:22 +0000 (12:12 +0300)
committerStephen Boyd <sboyd@codeaurora.org>
Wed, 19 Apr 2017 16:08:29 +0000 (09:08 -0700)
commit9adddb01ce5f71ae5c26b8aff01335d40be55133
tree48365a4dba1cbe0dc9b003820fb6b255ef2ea848
parent8062b4aafc67376fb55c0438f26410d0563459ec
clk: vc5: Add structure to describe particular chip features

Introduce vc5_chip_info structure to describe features of a particular
VC5 chip (id, number of FODs, number of outputs, flags).
For now flags are only used to indicate if chip has internal XTAL.
vc5_chip_info is set on probe from the matched of_device_id->data.

Also add defines to specify maximum number of FODs and clock outputs
supported by the driver.

With these changes it should be easier to extend driver to support
more VC5 models.

Signed-off-by: Alexey Firago <alexey_firago@mentor.com>
Reviewed-by: Marek Vasut <marek.vasut@gmail.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
drivers/clk/clk-versaclock5.c