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ARM: S3C6410: use correct divider_shift in setrate_clksrc()
authorThomas Abraham <thomas.ab@samsung.com>
Tue, 8 Sep 2009 05:26:00 +0000 (14:26 +0900)
committerBen Dooks <ben-linux@fluff.org>
Tue, 15 Sep 2009 23:50:05 +0000 (00:50 +0100)
commit9adb15b80bf1dc6b30a584e76efc876dfd029a13
treef1ac3dd776031e57b4d12f398cb4631e5dd84de3tree | snapshot (tar.gz zip)
parentbaa28e3530375e0bef2c53243634a1c78f5c02f3commit | diff
ARM: S3C6410: use correct divider_shift in setrate_clksrc()

In s3c64xx_setrate_clksrc() we used sclk->shift, but actually need to
use sclk->divider_shift to correctly calculate the value for the divider
register.

Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
[ben-linux@fluff.org: Minor re-indentation of description]
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
arch/arm/plat-s3c64xx/s3c6400-clock.c diff | blob | blame | history