clk: sunxi-ng: sun6i: Fix enable bit offset for hdmi-ddc module clock
authorChen-Yu Tsai <wens@csie.org>
Tue, 14 Feb 2017 02:23:32 +0000 (10:23 +0800)
committerMaxime Ripard <maxime.ripard@free-electrons.com>
Mon, 6 Mar 2017 06:36:04 +0000 (07:36 +0100)
commit9ad0bb39fce319d7b92c17d306ed0a9f70a02e7d
treec3f90202a217ea625f2c534142bb15782bbae4bc
parent69c9ae5041309553472ee798d7683be31bcdc434
clk: sunxi-ng: sun6i: Fix enable bit offset for hdmi-ddc module clock

The enable bit offset for the hdmi-ddc module clock is wrong. It is
pointing to the main hdmi module clock enable bit.

Reported-by: Bob Ham <rah@settrans.net>
Fixes: c6e6c96d8fa6 ("clk: sunxi-ng: Add A31/A31s clocks")
Cc: stable@vger.kernel.org # 4.9.x-
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
drivers/clk/sunxi-ng/ccu-sun6i-a31.c