clk: sunxi: Support factor clocks with N factor starting not from 0
authorChen-Yu Tsai <wens@csie.org>
Thu, 26 Jun 2014 15:55:41 +0000 (23:55 +0800)
committerMaxime Ripard <maxime.ripard@free-electrons.com>
Fri, 4 Jul 2014 10:05:12 +0000 (12:05 +0200)
commit9a5e6c7eb5ccbb5f0d3a1dffce135f0a727f40e1
tree283615dde84a477cae1909b831be8778867ad342
parent70eab199fa39cb78e13d369db55f24a3839b8f9e
clk: sunxi: Support factor clocks with N factor starting not from 0

The PLLs on newer Allwinner SoC's, such as the A31 and A23, have a
N multiplier factor that starts from 1, not 0.

This patch adds an option to the factor clk driver's config data
structures to specify the base value of N.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
drivers/clk/sunxi/clk-factors.c
drivers/clk/sunxi/clk-factors.h