ARM: 8408/1: Fix the secondary_startup function in Big Endian case
authorGregory CLEMENT <gregory.clement@free-electrons.com>
Thu, 6 Aug 2015 14:07:04 +0000 (15:07 +0100)
committerRussell King <rmk+kernel@arm.linux.org.uk>
Fri, 7 Aug 2015 18:57:02 +0000 (19:57 +0100)
commit998ef5d81c74c752d74c7925bc370909b84adb9d
tree1e1b8b2385fdf3bba639ef55110a389db914f483
parent3473f26592c1c365d376aee29433d7db75f14d1e
ARM: 8408/1: Fix the secondary_startup function in Big Endian case

Since the commit "b2c3e38a5471 ARM: redo TTBR setup code for LPAE",
the setup code had been reworked. As a result the secondary CPUs
failed to come online in Big Endian.

As explained by Russell, the new code expected the value in r4/r5 to
be the least significant 32bits in r4 and the most significant 32bits
in r5. However, in the secondary code, we load this using ldrd, which
on BE reverses that.

This patch swap r4/r5 after the ldrd. It is done using the xor
instructions in order to not use a temporary register.

Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
arch/arm/kernel/head.S