arm64: dts: marvell: fix interrupt-map property for Armada CP110 PCIe controller
authorThomas Petazzoni <thomas.petazzoni@free-electrons.com>
Thu, 28 Sep 2017 14:06:33 +0000 (16:06 +0200)
committerGregory CLEMENT <gregory.clement@free-electrons.com>
Mon, 2 Oct 2017 13:58:31 +0000 (15:58 +0200)
commit98f7d577c882be5a4e7403b3fdd1741d1baab6b5
treebfc3647c8dc30344bb1a5fe96690ec59e2f5a9f2
parent9e7460fc325dad06d2066abdbc1f4dd49456f9a4
arm64: dts: marvell: fix interrupt-map property for Armada CP110 PCIe controller

The interrupt-map property used in the description of the Marvell
Armada 7K/8K PCIe controllers has a bogus extraneous 0 that causes the
interrupt conversion to not be done properly. This causes the PCIe PME
and AER root port service drivers to fail their initialization:

[    5.019900] genirq: Setting trigger mode 7 for irq 114 failed (irq_chip_set_type_parent+0x0/0x30)
[    5.028821] pcie_pme: probe of 0001:00:00.0:pcie001 failed with error -22
[    5.035687] genirq: Setting trigger mode 7 for irq 114 failed (irq_chip_set_type_parent+0x0/0x30)
[    5.044614] aer: probe of 0001:00:00.0:pcie002 failed with error -22

This problem was introduced when the interrupt description was
switched from using the GIC directly to using the ICU interrupt
controller. Indeed, the GIC has address-cells = <1>, which requires a
parent unit address, while the ICU has address-cells = <0>.

Fixes: 6ef84a827c37 ("arm64: dts: marvell: enable GICP and ICU on Armada 7K/8K")
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Reviewed-by: Yehuda Yitschak <yehuday@marvell.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi
arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi