[SPARC64]: Add infrastructure for dynamic TSB sizing.
authorDavid S. Miller <davem@davemloft.net>
Wed, 1 Feb 2006 02:31:20 +0000 (18:31 -0800)
committerDavid S. Miller <davem@sunset.davemloft.net>
Mon, 20 Mar 2006 09:11:17 +0000 (01:11 -0800)
commit98c5584cfc47932c4f3ccf5eee2e0bae1447b85e
treec067ac8bfc081bbe0b3073374cb15708458e04ab
parent09f94287f7260e03bbeab497e743691fafcc22c3
[SPARC64]: Add infrastructure for dynamic TSB sizing.

This also cleans up tsb_context_switch().  The assembler
routine is now __tsb_context_switch() and the former is
an inline function that picks out the bits from the mm_struct
and passes it into the assembler code as arguments.

setup_tsb_parms() computes the locked TLB entry to map the
TSB.  Later when we support using the physical address quad
load instructions of Cheetah+ and later, we'll simply use
the physical address for the TSB register value and set
the map virtual and PTE both to zero.

Signed-off-by: David S. Miller <davem@davemloft.net>
arch/sparc64/kernel/binfmt_aout32.c
arch/sparc64/kernel/process.c
arch/sparc64/kernel/tsb.S
arch/sparc64/mm/tsb.c
include/asm-sparc64/mmu.h
include/asm-sparc64/mmu_context.h
include/asm-sparc64/tsb.h