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author	Thierry Reding <treding@nvidia.com>
	Mon, 20 Apr 2015 13:05:33 +0000 (15:05 +0200)
committer	Thierry Reding <treding@nvidia.com>
	Thu, 28 Apr 2016 10:41:48 +0000 (12:41 +0200)
commit	98c4b3661b5aee0e583d17d6304f6489c0f41155
tree	cdbb55a6cfb2d18bade67ba8ad2e876bfd743f71	tree \| snapshot (tar.gz zip)
parent	3d0f4e5f7a7c9ef2d8504f2b42f9c4d3233ba707	commit \| diff

clk: tegra: Add dpaux1 clock

This clock is of the same type as dpaux and is added to feed into the
second DPAUX block used in conjunction with SOR1.

Signed-off-by: Thierry Reding <treding@nvidia.com>

drivers/clk/tegra/clk-id.h		diff \| blob \| blame \| history
drivers/clk/tegra/clk-tegra-periph.c		diff \| blob \| blame \| history
drivers/clk/tegra/clk-tegra210.c		diff \| blob \| blame \| history