KVM: arm/arm64: vgic-new: Add PENDING registers handlers
authorAndre Przywara <andre.przywara@arm.com>
Tue, 1 Dec 2015 14:33:41 +0000 (14:33 +0000)
committerChristoffer Dall <christoffer.dall@linaro.org>
Fri, 20 May 2016 13:39:52 +0000 (15:39 +0200)
commit96b298000db48360e49a1f8f9edc6d2b9c1b2548
treeda31c7195b7cea7d92b5570eaf7ec39f55bb12af
parentfd122e620983003c376aca56892ac14a34a38d57
KVM: arm/arm64: vgic-new: Add PENDING registers handlers

The pending register handlers are shared between the v2 and v3
emulation, so their implementation goes into vgic-mmio.c, to be easily
referenced from the v3 emulation as well later.
For level triggered interrupts the real line level is unaffected by
this write, so we keep this state separate and combine it with the
device's level to get the actual pending state.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Marc Zyngier <marc.zyngier@arm.com>
Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org>
virt/kvm/arm/vgic/vgic-mmio-v2.c
virt/kvm/arm/vgic/vgic-mmio.c
virt/kvm/arm/vgic/vgic-mmio.h