PCI: thunder: Don't clobber read-only bits in bridge config registers
authorDavid Daney <david.daney@cavium.com>
Mon, 11 Apr 2016 23:29:32 +0000 (16:29 -0700)
committerBjorn Helgaas <bhelgaas@google.com>
Mon, 2 May 2016 17:31:53 +0000 (12:31 -0500)
commit93bf9073a8a7e844b27327b05ab4dc608354d6fd
treefcb8f5302f4d0d140d3ad81d3a65d11755248a90
parent9735a22799b9214d17d3c231fe377fc852f042e9
PCI: thunder: Don't clobber read-only bits in bridge config registers

The 32-bit addressing modes in the I/O and Prefetchable Memory registers
are required to be read-only.  Since the underlying access method allows
them to be set, emulate their read-only nature and always set them.

Signed-off-by: David Daney <david.daney@cavium.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
drivers/pci/host/pci-thunder-pem.c