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(parent: 3caa7d8) | patch
pinctrl: sh-pfc: r8a7795: Add drive strength support
authorLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Wed, 23 Mar 2016 14:06:01 +0000 (16:06 +0200)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Tue, 29 Mar 2016 07:23:01 +0000 (09:23 +0200)
commit92e6d9a2cc827018a18885e0f3050ab9ff8c3206
tree4446037f8212b5c3f6ad6ba09d29975994bd31eatree | snapshot (tar.gz zip)
parent3caa7d8c3f03ad6f1b66f10f67dc68cb3af55fe1commit | diff
pinctrl: sh-pfc: r8a7795: Add drive strength support

Define the drive strength registers for the R8A7795. As the PFC driver
for the SoC only defines GPIO pins at the moment, limit drive strength
support to those pins. Pins without GPIO capabilities will be supported
later.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
drivers/pinctrl/sh-pfc/pfc-r8a7795.c diff | blob | blame | history