clk/axs10x: Add I2S PLL clock driver
authorJose Abreu <Jose.Abreu@synopsys.com>
Mon, 2 May 2016 09:39:05 +0000 (10:39 +0100)
committerStephen Boyd <sboyd@codeaurora.org>
Fri, 6 May 2016 17:35:04 +0000 (10:35 -0700)
commit923587aafc2c41ed516d39651d5750ea402cfc06
tree533a48d7ef3592984d117786b7de2900a1abf554
parentc47265ad64fa793657ce7ecf1a8f636c794e9f40
clk/axs10x: Add I2S PLL clock driver

The ARC SDP I2S clock can be programmed using a
specific PLL.

This patch has the goal of adding a clock driver
that programs this PLL.

At this moment the rate values are hardcoded in
a table but in the future it would be ideal to
use a function which determines the PLL values
given the desired rate.

Signed-off-by: Jose Abreu <joabreu@synopsys.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Documentation/devicetree/bindings/clock/axs10x-i2s-pll-clock.txt [new file with mode: 0644]
drivers/clk/Makefile
drivers/clk/axs10x/Makefile [new file with mode: 0644]
drivers/clk/axs10x/i2s_pll_clock.c [new file with mode: 0644]