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(parent: c9d66d3) | patch
mfd: Fix max8925 irq control bit incorrect setting
authorKevin Liu <kliu5@marvell.com>
Wed, 8 Sep 2010 13:44:36 +0000 (09:44 -0400)
committerSamuel Ortiz <sameo@linux.intel.com>
Wed, 29 Sep 2010 08:14:53 +0000 (10:14 +0200)
commit90182317a9e383474613aa60e9d61d57bdf17c3e
tree82c15105db4f388ad06656789e565f7a8f5315datree | snapshot (tar.gz zip)
parentc9d66d3515bbb0ad8062721487de7ade02d2b936commit | diff
mfd: Fix max8925 irq control bit incorrect setting

In max8925_irq_sync_unlock(), irq control bit is set at the same time.
Zero means enabling irq, and one means disabling irq.

The original code is:
irq_chg[0] &= irq_data->enable;

It should be changed to:
irq_chg[0] &= ~irq_data->enable;

Otherwise, irq control bit is mess.

Signed-off-by: Kevin Liu <kliu5@marvell.com>
Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com>
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
drivers/mfd/max8925-core.c diff | blob | blame | history