clk: imx: increase AXI clock rate to 264MHz for i.MX6UL
authorAnson Huang <b20788@freescale.com>
Thu, 6 Aug 2015 14:13:56 +0000 (22:13 +0800)
committerShawn Guo <shawnguo@kernel.org>
Thu, 17 Sep 2015 00:52:17 +0000 (08:52 +0800)
commit8efaf5ed4d442068a1b76f218c0a90e6a5989f11
treeb636758b6883789c38ff99d3e310054de0c3d51a
parent6ff33f3902c3b1c5d0db6b1e2c70b6d76fba357f
clk: imx: increase AXI clock rate to 264MHz for i.MX6UL

On i.MX6UL, AXI clock rate's design target is 264MHz, but by default
it is only set to 198MHz which is NOT good enough for performance,
this patch increases AXI clock rate from 198MHz to 264MHz to meet
the design target, this is done by switching its parent clock
"periph" from 396MHz PFD to 528MHz PLL.

Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
drivers/clk/imx/clk-imx6ul.c