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ixgbe: Fix SR-IOV VLAN pool configuration
authorAlexander Duyck <aduyck@mirantis.com>
Tue, 3 Nov 2015 01:09:35 +0000 (17:09 -0800)
committerJeff Kirsher <jeffrey.t.kirsher@intel.com>
Sat, 12 Dec 2015 09:01:14 +0000 (01:01 -0800)
commit8e8e9a0b7df0194e95bb1d657f9edbdc6363f082
tree9a9164d1d4941de094a442981bac3717f7729342tree | snapshot (tar.gz zip)
parent530fd82a9fea5bba8e044bdf6fdf2ddc495e3807commit | diff
ixgbe: Fix SR-IOV VLAN pool configuration

The code for checking the PF bit in ixgbe_set_vf_vlan_msg was using the
wrong offset and as a result it was pulling the VLAN off of the PF even if
there were VFs numbered greater than 40 that still had the VLAN enabled.

Signed-off-by: Alexander Duyck <aduyck@mirantis.com>
Tested-by: Phil Schmitt <phillip.j.schmitt@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
drivers/net/ethernet/intel/ixgbe/ixgbe_sriov.c diff | blob | blame | history
Motorola kernel-slsi