drm/i915: Restore lost DPLL register write on gen2-4
authorVille Syrjälä <ville.syrjala@linux.intel.com>
Wed, 7 Oct 2015 19:08:24 +0000 (22:08 +0300)
committerJani Nikula <jani.nikula@intel.com>
Tue, 13 Oct 2015 14:03:18 +0000 (17:03 +0300)
commit8e7a65aa70bcc1235a44e40ae0da5056525fe081
treedf12be3c597c742f5e3fff3419a78c78e2e1cd07
parent40a24488f5250d63341e74b9994159afc4589606
drm/i915: Restore lost DPLL register write on gen2-4

We accidentally lost the initial DPLL register write in
1c4e02746147 drm/i915: Fix DVO 2x clock enable on 830M

The "three times for luck" hack probably saved us from a total
disaster. But anyway, bring the initial write back so that the
code actually makes some sense.

Reported-and-tested-by: Nick Bowler <nbowler@draconx.ca>
References: http://mid.gmane.org/CAN_QmVyMaArxYgEcVVsGvsMo7-6ohZr8HmF5VhkkL4i9KOmrhw@mail.gmail.com
Cc: stable@vger.kernel.org
Cc: Nick Bowler <nbowler@draconx.ca>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
drivers/gpu/drm/i915/intel_display.c