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(parent: 0217ccc) | patch
dmaengine: qcom_hidma: correct channel QOS register offset
authorSinan Kaya <okaya@codeaurora.org>
Sun, 16 Jul 2017 14:30:38 +0000 (10:30 -0400)
committerVinod Koul <vinod.koul@intel.com>
Wed, 19 Jul 2017 04:08:55 +0000 (09:38 +0530)
commit8e7341750b95b3732ba19e65745edbcb46ee6241
treebc8d02031f7823a8d2f70449fbc6679ca77f57e2tree | snapshot (tar.gz zip)
parent0217cccdbfb71bfa9482c323a380cedebcd96e41commit | diff
dmaengine: qcom_hidma: correct channel QOS register offset

A regression was found while testing QOS with different channels.
The QOS register offset is 0x700 rather than 0x300.

Signed-off-by: Sinan Kaya <okaya@codeaurora.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
drivers/dma/qcom/hidma_mgmt.c diff | blob | blame | history