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[MIPS] cevt-txx9: Reset timer counter on initialization
authorAtsushi Nemoto <anemo@mba.ocn.ne.jp>
Tue, 24 Jun 2008 14:26:38 +0000 (23:26 +0900)
committerRalf Baechle <ralf@linux-mips.org>
Thu, 3 Jul 2008 18:14:27 +0000 (19:14 +0100)
commit8986d2f50e1a9ba63f64ccbf59181886aa7898c3
tree0fde3d8ff52cb4cac35348c2464939fc7b6fc9e9tree | snapshot (tar.gz zip)
parent7e3297dc280f88ec0c6619a895f3d449776f952ecommit | diff
[MIPS] cevt-txx9: Reset timer counter on initialization

The txx9_tmr_init() will not clear a timer counter register in a certain
case.  The counter register is cleared on 1->0 transition of TCE bit if
CRE=1.  So just clearing the TCE bit is not enough.

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
arch/mips/kernel/cevt-txx9.c diff | blob | blame | history
Motorola kernel-slsi