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(parent: 7da3c55) | patch
ath9k: introduce bus specific cache size routine
authorGabor Juhos <juhosg@openwrt.org>
Wed, 14 Jan 2009 19:17:04 +0000 (20:17 +0100)
committerJohn W. Linville <linville@tuxdriver.com>
Thu, 29 Jan 2009 21:00:30 +0000 (16:00 -0500)
commit88d15707644fad1a137af7a17b00da6135f1c1a8
tree8f65aa4a632f0c32560f3bef2d2bcaef19b901actree | snapshot (tar.gz zip)
parent7da3c55ce849e17fd9017c7bf770a03fa083d95bcommit | diff
ath9k: introduce bus specific cache size routine

The PCI specific bus_read_cachesize routine won't work on the AHB bus,
we have to replace it with a suitable one later.

Changes-licensed-under: ISC

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Signed-off-by: Imre Kaloz <kaloz@openwrt.org>
Tested-by: Pavel Roskin <proski@gnu.org>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
drivers/net/wireless/ath9k/core.h diff | blob | blame | history
drivers/net/wireless/ath9k/main.c diff | blob | blame | history
Motorola kernel-slsi