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NTB: Register and offset values fix for memory window
authorShyam Sundar S K <ssundark@amd.com>
Thu, 1 Dec 2016 19:14:28 +0000 (00:44 +0530)
committerJon Mason <jdmason@kudzu.us>
Fri, 23 Dec 2016 21:09:18 +0000 (16:09 -0500)
commit872deb21038e90903a40ab6a29b9d0652a6ebc8d
tree4c8576514d360ed31fe38026597cd3a0f71dea8etree | snapshot (tar.gz zip)
parente5b0d2d1ba92a8e424e7395537a96e8a373d0267commit | diff
NTB: Register and offset values fix for memory window

Due to incorrect limit and translation register values, NTB link was
going down when the memory window was setup. Made appropriate changes
as per spec.

Fix limit register values for BAR1, which was overlapping
with the BAR23 address.

Signed-off-by: Shyam Sundar S K <Shyam-sundar.S-k@amd.com>
Acked-by: Allen Hubbe <Allen.Hubbe@dell.com>
Signed-off-by: Jon Mason <jdmason@kudzu.us>
drivers/ntb/hw/amd/ntb_hw_amd.c diff | blob | blame | history
Motorola kernel-slsi