drm/i915: add support for 5/6 data buffer partitioning on Haswell
authorPaulo Zanoni <paulo.r.zanoni@intel.com>
Fri, 31 May 2013 13:19:21 +0000 (10:19 -0300)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Fri, 31 May 2013 18:54:14 +0000 (20:54 +0200)
commit861f3389c6627460bcd19d1442eb650001f15c9b
treefb2be86c06a1e89467d336c0a4620477b7af095d
parentcca32e9ad372172c808b93eebff536459ce37d85
drm/i915: add support for 5/6 data buffer partitioning on Haswell

Now we compute the results for both 1/2 and 5/6 partitioning and then
use hsw_find_best_result to choose which one to use.

With this patch, Haswell watermarks support should be in good shape.
The only improvement we're missing is the case where the primary plane
is disabled: we always assume it's enabled, so we take it into
consideration when calculating the watermarks.

v2: - Check the latency when finding the best result

Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/intel_pm.c