ARM: Fix ioremap_cached()/ioremap_wc() for SMP platforms
authorRussell King <rmk+kernel@arm.linux.org.uk>
Fri, 9 Apr 2010 14:00:11 +0000 (15:00 +0100)
committerRussell King <rmk+kernel@arm.linux.org.uk>
Fri, 9 Apr 2010 14:00:11 +0000 (15:00 +0100)
commit85b3cce880a19e78286570d5fd004cc3cac06f57
treebf251707e89682972089dfec185ca5625db88e34
parent9823f1a8463fb631fe965110fe19adeb3df239c4
ARM: Fix ioremap_cached()/ioremap_wc() for SMP platforms

Write combining/cached device mappings are not setting the shared bit,
which could potentially cause problems on SMP systems since the cache
lines won't participate in the cache coherency protocol.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
arch/arm/mm/mmu.c