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(parent: 7dd47b8) | patch
clk: qcom: lcc-msm8960: Fix PLL rate detection
authorStephen Boyd <sboyd@codeaurora.org>
Thu, 29 Jan 2015 23:38:12 +0000 (15:38 -0800)
committerMichael Turquette <mturquette@linaro.org>
Wed, 25 Feb 2015 20:08:39 +0000 (12:08 -0800)
commit84b919fdb8559a8cd5432d8fa0002219df59cb32
tree807e1a1081c4bc56544cbf7dfc6fe4a3e3c6db9btree | snapshot (tar.gz zip)
parent7dd47b8ef54c301ecde58cecf2f3e29ff3f48d4acommit | diff
clk: qcom: lcc-msm8960: Fix PLL rate detection

regmap_read() returns 0 on success, not the value of the register
that is read. Fix it so we properly detect the frequency plan.

Fixes: b82875ee07e5 "clk: qcom: Add MSM8960/APQ8064 LPASS clock
controller (LCC) driver"
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Michael Turquette <mturquette@linaro.org>
drivers/clk/qcom/lcc-msm8960.c diff | blob | blame | history
Motorola kernel-slsi