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author	Paulo Zanoni <paulo.r.zanoni@intel.com>
	Fri, 4 May 2012 20:18:14 +0000 (17:18 -0300)
committer	Daniel Vetter <daniel.vetter@ffwll.ch>
	Tue, 8 May 2012 11:45:33 +0000 (13:45 +0200)
commit	837ba00f20aa47018a3317bc7c1f058be0a92e39
tree	1d738d6836a254c1fb7ee3ab0c502efdd20ecee7	tree \| snapshot (tar.gz zip)
parent	5e13a0c5ec05d382b488a691dfb8af015b1dea1e	commit \| diff

drm/i915: DSL_LINEMASK is 12 bits only on gen2

Gen3+ is 13 bits (12:0), and on gen2 only 12 (11:0). For both the high
bits are marked reserved, read-only so continue to mask them. Bit 31
is not reserved and has a meaning.

Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

drivers/gpu/drm/i915/i915_reg.h		diff \| blob \| blame \| history
drivers/gpu/drm/i915/intel_display.c		diff \| blob \| blame \| history

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