arm64: debug: avoid resetting stepping state machine when TIF_SINGLESTEP
authorWill Deacon <will.deacon@arm.com>
Fri, 26 Aug 2016 10:36:39 +0000 (11:36 +0100)
committerWilly Tarreau <w@1wt.eu>
Mon, 6 Feb 2017 22:32:54 +0000 (23:32 +0100)
commit83099f397a9faaf75a8f249733b2b57d72a264eb
tree73ac8da74f8dd9d4e03652eb1b04cf02397db3af
parentd65df5171a258ac766fa959cf453c6c7b9851cf3
arm64: debug: avoid resetting stepping state machine when TIF_SINGLESTEP

commit 3a402a709500c5a3faca2111668c33d96555e35a upstream.

When TIF_SINGLESTEP is set for a task, the single-step state machine is
enabled and we must take care not to reset it to the active-not-pending
state if it is already in the active-pending state.

Unfortunately, that's exactly what user_enable_single_step does, by
unconditionally setting the SS bit in the SPSR for the current task.
This causes failures in the GDB testsuite, where GDB ends up missing
expected step traps if the instruction being stepped generates another
trap, e.g. PTRACE_EVENT_FORK from an SVC instruction.

This patch fixes the problem by preserving the current state of the
stepping state machine when TIF_SINGLESTEP is set on the current thread.

Cc: <stable@vger.kernel.org>
Reported-by: Yao Qi <yao.qi@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Willy Tarreau <w@1wt.eu>
arch/arm64/kernel/debug-monitors.c