net: axienet: fix number of TX ring slots for available check
authorRobert Hancock <robert.hancock@calian.com>
Tue, 18 Jan 2022 21:41:30 +0000 (15:41 -0600)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Thu, 27 Jan 2022 07:47:41 +0000 (08:47 +0100)
commit81fb2351f0ad558b531dbd66961f0123ebceedd0
treebb87723e776b708a6dc7caf3d6b437dd10410a20
parent9f1a3c13342b4d96b9baa337ec5fb7d453828709
net: axienet: fix number of TX ring slots for available check

commit aba57a823d2985a2cc8c74a2535f3a88e68d9424 upstream.

The check for the number of available TX ring slots was off by 1 since a
slot is required for the skb header as well as each fragment. This could
result in overwriting a TX ring slot that was still in use.

Fixes: 8a3b7a252dca9 ("drivers/net/ethernet/xilinx: added Xilinx AXI Ethernet driver")
Signed-off-by: Robert Hancock <robert.hancock@calian.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/net/ethernet/xilinx/xilinx_axienet_main.c