drm/radeon/si: properly handle internal cp ints
authorAlex Deucher <alexander.deucher@amd.com>
Tue, 3 Sep 2013 17:31:33 +0000 (13:31 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Wed, 11 Sep 2013 15:44:23 +0000 (11:44 -0400)
commit811e4d58edf98f1ff5d3478e2c5f61034d359ab3
tree3121d645669db2c9906ca700e162eccb1a66b145
parent4214faf6210a107ba83b2cfb67287f3265ea6e12
drm/radeon/si: properly handle internal cp ints

The internal cp interrupts need to be enabled and
disabled at specific times in order clockgating to
work properly.  This patch changes the handling
of the CP_INT_CNTL register to respect the current
state of the internal CP interrupts when making
changes to the other interrupts in CP_INT_CNTL.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/radeon/si.c