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MIPS: Extend DMA_MAYBE_COHERENT logic to DMA_NONCOHERENT use
authorManuel Lauss <manuel.lauss@gmail.com>
Thu, 20 Feb 2014 13:59:22 +0000 (14:59 +0100)
committerRalf Baechle <ralf@linux-mips.org>
Wed, 26 Mar 2014 22:09:20 +0000 (23:09 +0100)
commit8005711c8d80e452748e9572bead54493818f042
tree193f76f8296c996e44e8c2bf18b74e3c28aaaf4ctree | snapshot (tar.gz zip)
parentbfc3c5a6c71ea17b79ad524c5627333bd46834a2commit | diff
MIPS: Extend DMA_MAYBE_COHERENT logic to DMA_NONCOHERENT use

Setting DMA_MAYBE_COHERENT gives a platform the opportunity to select
use of cache ops at boot.

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Cc: Linux-MIPS <linux-mips@linux-mips.org>
Patchwork: https://patchwork.linux-mips.org/patch/6575/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
arch/mips/include/asm/io.h diff | blob | blame | history
arch/mips/mm/c-r4k.c diff | blob | blame | history
arch/mips/mm/cache.c diff | blob | blame | history
Motorola kernel-slsi