MIPS: Add Octeon III register accessors & definitions
authorJames Hogan <james.hogan@imgtec.com>
Tue, 14 Mar 2017 10:25:44 +0000 (10:25 +0000)
committerJames Hogan <james.hogan@imgtec.com>
Tue, 28 Mar 2017 14:36:04 +0000 (15:36 +0100)
commit7d8a528d19815e57566d1e2277f9535e43f4cb68
tree12de8961dce9f091553caaa111c7561a5e2f3a5d
parentedec9d7bdc4eb3845ec7a3f9610f0d54a7152e90
MIPS: Add Octeon III register accessors & definitions

Add accessors for some VZ related Cavium Octeon III specific COP0
registers, along with field definitions. These will mostly be used by
KVM to set up interrupt routing and partition the TLB between root and
guest.

Signed-off-by: James Hogan <james.hogan@imgtec.com>
Acked-by: Ralf Baechle <ralf@linux-mips.org>
Cc: David Daney <david.daney@cavium.com>
Cc: Andreas Herrmann <andreas.herrmann@caviumnetworks.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: "Radim Krčmář" <rkrcmar@redhat.com>
Cc: linux-mips@linux-mips.org
Cc: kvm@vger.kernel.org
arch/mips/include/asm/mipsregs.h